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3.0 kv rms, dual - channel digital isolators data sheet adum120n / adum121n rev. a document feedback information furnished by analog dev ices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. o ne technology way, p.o. box 9106, norwood, ma 02062 - 9106, u .s.a. tel: 781.329.4700 ? 2016 analog devices, inc. all rights reserved. technical support www.analog.co m features high common - mode transient immunity: 100 kv/s typical high robustness to radiated and conducted noise low propagation delay 13 ns maximum for 5 v operation 15 ns maximum for 1.8 v operation 150 mbps m ini mum data rate safety and regulatory approvals (pending) ul recognition : 3 000 v rms for 1 minute per ul 1577 csa component acceptance no tice 5a vde certificate of conformity din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 v iorm = 565 v peak cqc c ertification per gb4943.1 - 2011 backward compatibility adum120n0 pin - compatible with adum1285 adum120n1 pin - compatible with adum1280 and adum1200 adum121n0 pin - compatible with adum1286 adum121n1 pin - compatible with adum1281 and adum1201 low dynamic power consumption 1.8 v to 5 v level translation high temperature operation: 125c failsafe high or low options 8- lead, rohs - compliant, soic package qualified for automotive applications applications general - purpose multichannel isolation industrial field bus isolation functional block dia grams encode decode encode decode v dd1 v ia v ib gnd 1 v dd2 v oa v ob gnd 2 1 2 3 4 8 7 6 5 adum120n 14122-001 f igure 1. adum120n functional block diagram encode decode decode encode v dd1 v oa v ib gnd 1 v dd2 v ia v ob gnd 2 1 2 3 4 8 7 6 5 adum121n 14122-002 f igure 2. adum121n functional block diagram general description the adum120n / adum121n 1 are dua l- channel digital isolators based on analog devices, inc., i cou pler? technology. combining high speed, complementary metal - oxide semiconductor (cmos ) and monolithic air core transformer technology, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler d evices and other integrated couplers. the maximum propagation delay is 13 ns with a pulse width distortion of less than 3 ns at 5 v operation. channel matching is tight at 3.0 ns maximum. the adum120n / adum121n data channels are independent and are available in a variety of configurations with a withstand voltage rating of 3 kv rms (see the ordering guide ). the devices operate with the supply voltage on either side ranging from 1.8 v t o 5 v, providing compatibility with lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. unlike o ther optocoupler alternatives, dc correctness is ensured in the absence of input logic transitions. two different fail - safe options are available in which the outputs transition to a predetermined state when the input power supply is not applied or the inp uts are disabled. the adum120n0 is pin - compatible with the adum1285 , and t he adum120n1 is pin - compatible with the adum1280 and the adum1200 . the adum121n0 is pin - compatible with adum1286 , and t he adum121n0 is pin - co mpatible with the adum1281 and the adum1201. 1 protected by u.s. patents 5,952,849; 6,873,065; 6,903,578; and 7,075 ,329. other patents are pending.
adum120n/adum121n data sheet rev. a | page 2 of 19 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagrams ............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? electrical characteristics5 v operation................................ 3 ? electrical characteristics3.3 v operation ............................ 5 ? electrical characteristics2.5 v operation ............................ 7 ? electrical characteristics1.8 v operation ............................ 9 ? insulation and safety related specifications .......................... 10 ? package characteristics ............................................................. 10 ? regulatory information ............................................................. 11 ? din v vde v 0884-10 (vde v 0884-10) insulation characteristics ............................................................................ 12 ? recommended operating conditions .................................... 12 ? absolute maximum ratings ......................................................... 13 ? esd caution................................................................................ 13 ? pin configurations and function descriptions ......................... 14 ? typical performance characteristics ........................................... 15 ? applications information .............................................................. 16 ? overview ..................................................................................... 16 ? pcb layout ................................................................................. 16 ? propagation delay related parameters ................................... 17 ? jitter measurement ..................................................................... 17 ? insulation lifetime ..................................................................... 17 ? outline dimensions ....................................................................... 19 ? ordering guide .......................................................................... 19 ? automotive products ................................................................. 19 ? revision history 4/16rev. 0 to rev. a changes to features section............................................................ 1 changes to jitter measurement section ....................................... 17 changes to ordering guide .......................................................... 19 added automotive products section .......................................... 19 1/16revision 0: initial version
data sheet adum120n/adum121n rev. a | page 3 of 19 specifications electrical characte ristics 5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 5 v. m inimum/maximum specifications apply over the entire recommended operation range of 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v, and ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. tabl e 1 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pulse width distortion (pwd) limit data rate 150 mbps within pwd limit propagation delay t phl , t p lh 4.8 7.2 13 ns 50% input to 50% output pulse width distortion pwd 0.5 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 6.0 ns between any two units at the same temperature, voltage, and load channel matching codirectional t pskcd 0.5 3.0 ns opposing direction t pskod 0.5 3.0 ns jit ter 380 ps p -p see the jitter measurement section 55 ps rms see the jitter measurement section dc specifications input threshold voltage logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 1 = ?20 a, v ix = v ixh 2 v ddx ? 0.4 v ddx ? 0.2 v i ox 1 = ?4 ma, v ix = v ixh 2 logic low v ol 0.0 0.1 v i ox 1 = 20 a, v ix = v ixl 3 0. 2 0.4 v i ox 1 = 4 ma, v ix = v ixl 3 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx quiescent supply current adum120n i dd1 (q) 0.9 1.3 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.3 1.8 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 6.4 10.0 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 1.4 1.9 ma v i 4 = 1 (n0), 0 (n1) 5 adum121n i dd1 (q) 1.1 1.6 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.1 1.5 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 4.0 5.8 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 4.9 6.4 ma v i 4 = 1 (n0), 0 (n1) 5 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynami c output i ddo (d) 0.02 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
adum120n/adum121n data sheet rev. a | page 4 of 19 parameter symbol min typ max unit test conditions/comments ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 6 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 i ox is t he cha nnel x output current, where x = a or b . 2 v ixh is the input side logic high voltage . 3 v ixl is the input side logic low voltage . 4 v i is the input voltage. 5 n0 is the adum120n0 / adum121n0 models, and n 1 is the adum12 0n1 / adum121n1 model s. s ee the ordering guide . 6 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining the vo ltage output (v o ) > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 2 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum120n supply current side 1 i dd1 3.7 6.8 4.2 7.2 6.2 9.3 ma supply current side 2 i dd2 1.4 2.0 2.5 3.2 6.0 8.1 ma adum121n supply current side 1 i dd1 2.6 4.5 3.2 5.4 5.4 8.2 ma supply current side 2 i dd2 3.0 4.9 3.7 5.9 5.8 8.6 ma
data sheet adum120n/adum121n rev. a | page 5 of 19 electrical character istics 3.3 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 3.3 v. minimum/maximum specifications apply over the entire recommended op eration range: 3.0 v v dd1 3.6 v, 3.0 v v dd2 3.6 v, and ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 3 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit propagation delay t phl , t plh 4.8 6.8 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, and load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitt er 290 ps p -p see the jitter measurement section 45 ps rms see the jitter measurement section dc specifications input threshold voltage logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 1 = ?20 a, v ix = v ixh 2 v ddx ? 0.4 v ddx ? 0.2 v i ox 1 = ?2 ma, v ix = v ixh 2 logic low v ol 0.0 0.1 v i ox 1 = 20 a, v ix = v ixl 3 0. 2 0.4 v i ox 1 = 2 ma, v ix = v ixl 3 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx quiescent supply current adum120n i dd1 (q) 0.8 1.3 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.2 1.8 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 6.3 9.7 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 1.3 1.8 ma v i 4 = 1 (n0), 0 (n1) 5 adum121n i dd1 (q) 1.0 1.6 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.0 1.5 ma v i 4 = 01 (n0), 1 (n1) 5 i dd1 (q) 3.9 5.8 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 4.8 6.4 ma v i 4 = 1 (n0), 0 (n1) 5 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs switching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
adum120n/adum121n data sheet rev. a | page 6 of 19 parameter symbol min typ max unit test conditions/comments ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 6 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 80 0 v 1 i ox is t he channel x outp u t current , where x = a or b. 2 v ixh is the input side logic high voltage . 3 v ixl is the input side logic low voltage . 4 v i is the input voltage. 5 n 0 is the adum120n0 / adum121n0 models, and n 1 is the adum120n1 / adum121n1 models . see the ordering guide . 6 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 4 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum120n supply current side 1 i dd1 3.6 6.2 4.0 6.7 5.6 9.1 ma supply current side 2 i dd2 1.3 1.9 2.3 3.1 5.2 6.8 ma adum121n supply current side 1 i dd1 2.5 4.6 3.0 5.5 5.0 8.1 ma supply current side 2 i dd2 2.9 4.8 3.5 5.8 5.4 8.3 ma
data sheet adum120n/adum121n rev. a | page 7 of 19 electrical character istics 2.5 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 2.5 v. minimum/maximum specifications ap ply over the entire recommended operation range: 2.25 v v dd1 2.75 v, 2.25 v v dd2 2.75 v, ? 40c t a + 125c, unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 5 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit pr opagation delay t phl , t plh 5.0 7.0 14 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitter 320 ps p -p see the jitter measurement section 65 ps rms see the jitter measurement section dc specifications input threshold voltage logic high v ih 0 .7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 1 = ?20 a, v ix = v ixh 2 v ddx ? 0.4 v ddx ? 0.2 v i ox 1 = ?2 ma, v ix = v ixh 2 logic low v ol 0.0 0.1 v i ox 1 = 20 a, v ix = v ixl 3 0. 2 0.4 v i ox 1 = 2 ma, v ix = v ixl 3 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx quiescent supply current adum120n i dd1 (q) 0.8 1.2 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.2 1.8 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 6.2 9.5 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 1.3 1.8 ma v i 4 = 1 (n0), 0 (n1) 5 adum121n i dd1 (q) 1.0 1.5 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.0 1.4 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 3.9 5.8 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 4.8 6.4 ma v i 4 = 1 (n0), 0 (n1) 5 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs s witching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
adum120n/adum121n data sheet rev. a | page 8 of 19 parameter symbol min typ max unit test conditions/comments a c specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 6 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 i ox is t he channe l x o utput current , where x = a or b . 2 v ixh is the input side logic high voltage . 3 v ixl is the input side logic low voltage . 4 v i is the input voltage. 5 n 0 is the adum120n0 / adum121n0 models, and n 1 is the adum120n1 / adum121n1 models . see the ordering guide . 6 |cm h | is the maximum common - mode voltage slew rate that can be sustain ed while maintaining v o > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 6 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum120n supply current side 1 i dd1 3.5 6.2 3.9 6.6 5.4 9.0 ma supply current side 2 i dd2 1.3 1.9 2.0 2.8 4.2 5.8 ma adum121n supply current side 1 i dd1 2.4 4.7 2.9 5.5 4.5 8.0 ma supply current side 2 i dd2 2.9 4.9 3.3 5.7 4.9 7.7 ma
data sheet adum120n/adum121n rev. a | page 9 of 19 electrical character istics 1.8 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 1.8 v. minimum/maximum specifications apply over the entire recommended operation range: 1.7 v v dd1 1.9 v, 1.7 v v dd2 1.9 v, and ? 40c t a + 125c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. supply currents are specified with 50% duty cycle signals. table 7 . parameter symbol min typ max unit test conditions/comments switching specifications pulse width pw 6.6 ns within pwd limit data rate 150 mbps within pwd limit propag ation delay t phl , t plh 5.8 8.7 15 ns 50% input to 50% output pulse width distortion pwd 0.7 3 ns |t plh ? t phl | change vs. temperature 1.5 ps/c propagation delay skew t psk 7.0 ns between any two units at the same temperature, voltage, and load channel matching codirectional t pskcd 0.7 3.0 ns opposing direction t pskod 0.7 3.0 ns jitt er 630 ps p -p see the jitter measurement section 190 ps rms see the jitter measurement section dc specifications input threshold voltage logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltage logic high v oh v ddx ? 0.1 v ddx v i ox 1 = ?20 a, v ix = v ixh 2 v ddx ? 0.4 v ddx ? 0.2 v i ox 1 = ?2 ma, v ix = v ixh 2 logic low v ol 0.0 0.1 v i ox 1 = 20 a, v ix = v ixl 3 0. 2 0.4 v i ox 1 = 2 ma, v ix = v ixl 3 input current per channel i i ?10 +0.01 +10 a 0 v v ix v ddx quiescent supply current adum120n i dd1 (q) 0.7 1.2 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.2 1.8 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 6.2 9.6 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 1.3 1.8 ma v i 4 = 1 (n0), 0 (n1) 5 adum121n i dd1 (q) 1.0 1.5 ma v i 4 = 0 (n0), 1 (n1) 5 i dd2 (q) 1.0 1.4 ma v i 4 = 0 (n0), 1 (n1) 5 i dd1 (q) 3.8 5.8 ma v i 4 = 1 (n0), 0 (n1) 5 i dd2 (q) 4.7 6.4 ma v i 4 = 1 (n0), 0 (n1) 5 dynamic supply current dynamic input i ddi (d) 0.01 ma/mbps inputs s witching, 50% duty cycle dynamic output i ddo (d) 0.01 ma/mbps inputs switching, 50% duty cycle undervoltage lockout uvlo positive v ddx threshold v ddxuv+ 1.6 v negative v ddx threshold v ddxuv? 1.5 v v ddx hysteresis v ddxuvh 0.1 v
adum120n/adum121n data sheet rev. a | page 10 of 19 parameter symbol min typ max unit test conditions/comments ac specifications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 6 |cm h | 75 100 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v |cm l | 75 100 kv/s v ix = 0 v, v cm = 1000 v, transient magnitude = 800 v 1 i ox is t he channel x o utput current , where x = a or b. 2 v ixh is the input side logic high voltage . 3 v ixl is the input side logic low voltage . 4 v i is the input voltage. 5 n 0 is the adum120n0 / adum121n0 models, n 1 is the adum120n1 / adum121n1 models . see the ordering guide . 6 |cm h | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v ddx . |cm l | is the maximum common - mode voltage slew rate that can be sustained while maintaining v o > 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. table 8 . total supply current vs. data throughput 1 mbps 25 mbps 100 mbps parameter symbol min typ max min typ max min typ max unit supply current adum120n supply current side 1 i dd1 3.4 6.0 3.8 6.4 5.2 8.4 ma supply current side 2 i dd2 1.2 1.8 1.9 2.8 4.0 5.8 ma adum121n supply current side 1 i d d1 2.4 4.7 2.8 5.5 4.4 7.8 ma supply current side 2 i dd2 2.8 4.8 3.2 5.6 4.8 7.9 ma insulation and safety related specificat ions for additional information, see www.analog.co m/icouplersafety . table 9 . parameter symbol value unit test conditions/comments rated dielectric insulation voltage 3000 v rms 1- minute duration minimum external air gap (clearance) l (i01) 4.0 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l (i02) 4.0 mm min measured from input terminals to output terminals, shortest distance path along body minimum clearance in the plane of the printed circuit boar d (pcb clearance) l (pcb) 4.5 mm min measured from input terminals to output terminals, shortest distance through air, line of sight, in the pcb mounting plane minimum internal gap (internal clearance) 25.5 m min insulation distance through insulation tracking resistance (comparative tracking index) cti >400 v din iec 112/vde 0303 part 1 material group ii material group (din vde 0110, 1/89, table 1) package characterist ics table 10. parameter symbol min typ max unit test c onditions/comments resistance (input to output) 1 r i-o 10 13 ? capacitance (input to output) 1 c i-o 2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction to ambient thermal resistance ja 80 c /w thermocouple located at center of package underside 1 the device is considered a 2 - terminal device: pin 1 through pin 4 are shorted together, and pin 5 through pin 8 are shorted together. 2 input capacit ance is from any input data pin to ground.
data sheet adum120n/adum121n rev. a | page 11 of 19 regulatory informati on see table 15 and the insulation lifetime section for details regarding recommended maximum working voltages for specific cr oss - isolation waveforms and insulation levels. table 11. ul (pending) csa (pending) vde (pending) cqc (pending) recognized under ul 1577 component recognition program 1 approved under csa component acceptance notice 5a din v vde v 0884 - 10 (vde v 0884 - 10):2006 -12 2 certified under cqc11 - 471543- 2012 single protection, 3000 v rms isolation voltage csa 60950 -1- 07+a1+a2 and iec 60950 - 1, second edition, +a1+a2: reinforced insulation, 565 v peak , v iosm = 6000 v peak gb4943.1 - 2011 double protection, 3000 v rms isolation voltage basic insulation at 400 v rms (565 v peak) basic insulation , 565 v peak, v iosm = 10000 v peak basic insulation at 770 v rms (1089 v peak) working voltage reinforced insulation at 200 v rms (283 v peak) reinforced insulation at 385 v rms (545 v peak) iec 60601 -1 e dition 3.1: basic insulation (1 mopp), 250 v rms (354 v peak) csa 61010 -1- 12 and iec 61010 -1 third edition basic insulation at 300 v rms m ains, 400 v rms (565 v peak) reinforced insulatio n at 300 v rms m ains, 200 v secondary (283 v peak) file e214100 file 205078 file 2471900 - 4880 - 0001 file (pending) 1 in accordance with ul 1577, e ach adum12 0n / adum121n is proof tested by apply ing an insulation test voltage 36 0 0 v rms for 1 sec . 2 in accordance with din v vde v 0884 - 10 , each adum12 0n / adum121n is proof tested by applying a n insulation test voltage 1059 v peak for 1 sec (partial discharge detection limit = 5 pc). the * marking branded on the component designates din v vde v 0884 - 10 approval.
adum120n/adum121n data sheet rev. a | page 12 of 19 din v vde v 0884 - 10 (vde v 0884 - 10) insulation character istics these isolators are suitable for reinforced electrica l isolation only within the safety limit data. protective circuits ensure the maintenance of the safety data. the * marking on packages denotes din v vde v 0884 - 10 approval. table 12. description test conditions/comments symbol cha racteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to iii climatic classification 40/ 10 5/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 565 v peak input to output test voltage, method b1 v iorm 1.875 = v pd (m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd (m) 105 9 v peak input to output test voltage, method a after environmental tests subgroup 1 v iorm 1.5 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc v pd (m) 848 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pc 678 v peak highest allowable overvo ltage v iotm 420 0 v peak surge isolation voltage basic v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 10000 v peak surge isolation voltage reinforced v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety limiti ng values maximum value allowed in the event of a failure (see figure 3 ) maximum junction temperature t s 150 c total power dissipation at 25c p s 1.56 w insulation resistance at t s v io = 500 v r s >10 9 ? 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 50 100 150 200 safety limiting power (w) ambient temperature (c) 14122-003 figure 3. thermal derating curve, dependence of safety limiting values with ambient temperature per din v vde v 0884 - 10 recommended operatin g conditions table 13. parameter symbol rating operating temperature t a ?40c to +125c supply voltages v dd1 , v dd2 1.7 v to 5.5 v input signal rise and fall times 1.0 ms
data sheet adum120n/adum121n rev. a | page 13 of 19 absolute maximum rat ings t a = 25c, unless otherwise noted. table 14. parameter rating supply voltages (v dd1 , v dd2 ) ?0.5 v to +7.0 v input voltages (v ia , v ib ) 1 ?0.5 v to v ddi + 0.5 v output voltages (v oa , v ob ) 2 ?0.5 v to v ddo + 0.5 v average output current per pin 3 side 1 output current (i o1 ) ?10 ma to +10 ma side 2 output current (i o2 ) ?10 ma to +10 ma common - mode transients 4 ?150 kv/ s to +150 kv/ s storage temperature (t st ) range ?65c to +150c ambient operating temperature (t a ) range ?40c to +125c 1 v ddi is the input side supply voltage. 2 v ddo is the output side supply voltage. 3 see figure 3 for the maximum rated current values for various temperatures. 4 common - mode transients r efer to the common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum ratings may c ause latch - up or permanent damage. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those in dicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution table 15. maximum continuous working voltage 1 parameter rating constraint 2 ac v o ltage lifetime limited by package creepage maximum approved working voltage per iec 60950 -1 bipolar waveform basic insulation 789 v peak reinforced insulation 403 v p eak unipolar waveform basic in sulation 909 v peak reinforced insulation 469 v peak dc v o ltage lifetime limited by package creepage maximum approved working voltage per iec 60950 -1 basic insulation 558 v peak reinforced insulation 285 v peak 1 maximum continuous working voltag e r efers to the continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more details. 2 insulation lifetime for the specified test condition is greater than 50 yea rs. truth tables table 16. adum120n / adum121n truth table (positive logic) v ix input 1 v ddi state 1 v ddo state 1 default low (n0), v ox output 1 , 2 default high (n1), v ox output 1 , 2 test conditions/comments l ow powered powered l ow l ow normal operation h igh powered powered h igh h igh normal operation dont care 3 unpowered powered l ow h igh fail - safe output don t care 3 powered unpowered indeterminate indeterminate 1 v ix and v ox refer to the input and output signa ls of a given channel (a or b ). v ddi and v ddo refer to the supply voltages on the input and output sides of the given channel, respectively. 2 n 0 is the adum120n0 / adum121n0 models, n 1 is the adum120n1 / adum121n1 model s . see the ordering guide . 3 input pins (v ix ) on the same side as an unpowered supply must be in a low state to avoid powering the device through its esd protection circ uitry.
adum120n/adum121n data sheet rev. a | page 14 of 19 pin configurations and function descriptions 1 8 2 7 3 6 4 5 top view (not to scale) adum120n v dd1 v ia v ib gnd 1 v dd2 v oa v ob gnd 2 14122-004 figure 4. adum120n pin configuration reference the an-1109 application note for specific layout guidelines. table 17. adum120n pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1. 2 v ia logic input a. 3 v ib logic input b. 4 gnd 1 ground 1. this pin is the ground reference for isolator side 1. 5 gnd 2 ground 2. this pin is the ground reference for isolator side 2. 6 v ob logic output b. 7 v oa logic output a. 8 v dd2 supply voltage for isolator side 2. 1 8 2 7 3 6 4 5 top view (not to scale) adum121n v dd1 v oa v ib gnd 1 v dd2 v ia v ob gnd 2 14122-005 figure 5. adum121n pin configuration reference the an-1109 application note for specific layout guidelines. table 18. adum121n pin function descriptions pin no. mnemonic description 1 v dd1 supply voltage for isolator side 1. 2 v oa logic output a. 3 v ib logic input b. 4 gnd 1 ground 1. this pin is the ground reference for isolator side 1. 5 gnd 2 ground 2. this pin is the ground reference for isolator side 2. 6 v ob logic output b. 7 v ia logic input a. 8 v dd2 supply voltage for isolator side 2.
data sheet adum120n/adum121n rev. a | page 15 of 19 typical performance characteristics 10 0 1 2 3 4 5 6 7 8 9 0 20 40 60 80 100 120 140 160 i dd1 supply current (ma) data rate (mbps) 14122-106 5v 3.3v 2.5v 1.8v figure 6. adum120n i dd1 supply current vs. data rate at various voltages 10 0 1 2 3 4 5 6 7 8 9 0 20 40 60 80 100 120 140 160 i dd2 supply current (ma) data rate (mbps) 14122-109 5v 3.3v 2.5v 1.8v figure 7. adum120n i dd2 supply current vs. data rate at various voltages 14 0 2 4 6 8 10 12 ?40 ?20 0 20 40 60 80 100 120 140 propagation delay, t plh (ns) temperature (c) 14122-108 5v 3.3v 2.5v 1.8v figure 8 . propagation delay for logic high output (t plh ) vs. temperature at various voltages 10 0 1 2 3 4 5 6 7 8 9 0 20 40 60 80 100 120 140 160 i dd1 supply current (ma) data rate (mbps) 14122-107 5v 3.3v 2.5v 1.8v figure 9. adum121n i dd1 supply current vs . data rate at various voltages 10 0 1 2 3 4 5 6 7 8 9 0 20 40 60 80 100 120 140 160 i dd2 supply current (ma) data rate (mbps) 14122-110 5v 3.3v 2.5v 1.8v figure 10 . adum121n i dd2 supply current vs. data rate at various voltages 14 0 2 4 6 8 10 12 ?40 ?20 0 20 40 60 80 100 120 140 propagation delay, t phl (ns) temperature (c) 14122-111 5v 3.3v 2.5v 1.8v figure 11 . propagation delay for logic low output (t phl ) vs. temperature at various voltages
adum120n/adum121n data sheet rev. a | page 16 of 19 applications information overview the adum120n / adum121n use a high frequency carrier to transmit data across an isolation barrier using icoupler chip scale transformer coils separated by layers of polyimide isolation. with an on/off keying (ook) technique and the differential architecture shown in figure 13 and figure 14, the adum120n / adum121n have very low propagation delay and high speed. internal regulators and input/output design techniques allow logic and supply voltages over a wide range from 1.7 v to 5.5 v, offering voltage translation of 1.8 v, 2.5 v, 3.3 v, and 5 v logic. the architecture is designed for high common-mode transient immunity and high immunity to electrical noise and magnetic interference. radiated emissions are minimized with a spread spectrum ook carrier and other techniques. figure 13 shows the operation block diagram of a single channel for the adum120n0 / adum121n0 models, which have the condition of the fail-safe output state equal to low, where the carrier waveform is off when the input state is low. if the input side is off or not operating, the fail-safe output state of low (noted by the 0 in the model number) sets the output to low. for the adum120n1 / adum121n1 , which have a fail-safe output state of high, figure 14 shows the conditions where the carrier waveform is off when the input state is high. when the input side is off or not operating, the fail-safe output state of high (noted by the 1 in the model number) sets the output to high. see the ordering guide for the model numbers that have the fail-safe output state of low or the fail-safe output state of high. pcb layout the adum120n / adum121n digital isolators require no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the input and output supply pins (see figure 12). bypass capacitors are most conveniently connected between pin 1 and pin 4 for v dd1 and between pin 5 and pin 8 for v dd2 . the recommended bypass capacitor value is between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power supply pin must not exceed 10 mm. v dd1 v ia/ v oa v ib v dd2 v oa/ v ia v ob gnd 1 gnd 2 14122-010 figure 12. recommended printed circuit board layout in applications involving high common-mode transients, ensure that board coupling across the isolation barrier is minimized. furthermore, design the board layout such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this can cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. see the an-1109 application note for board layout guidelines. transmitter gnd 1 gnd 2 v in v out receiver regulator regulator 14122-011 figure 13. operational block diagram of a single channel with a low fail-safe output state transmitter gnd 1 gnd 2 v in v out receiver regulator regulator 14122-012 figure 14. operational block diagram of a single channel with a high fail-safe output state
data sheet adum120n/adum121n rev. a | page 17 of 19 propagation delay related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the propagation delay to a logic 0 output may differ from the propagation delay to a logic 1 output. input (v ix ) output (v ox ) t plh t phl 50% 50% 14122-013 figure 15. propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. channel matching is the maximum amount the propagation delay differs between channels within a single adum120n / adum121n component. propagation delay skew is the maximum amount the propagation delay differs between multiple adum120n / adum121n components operating under the same conditions jitter measurement figure 16 shows the eye diagram for the adum120n / adum121n . the measurement was taken using an agilent 81110a pulse pattern generator at 150 mbps with pseudorandom bit sequences (prbs) 2(n ? 1), n = 14, for 5 v supplies. jitter was measured with the tektronix model 5104b oscilloscope, 1 ghz, 10 gs/s with the dpojet jitter and eye diagram analysis tools. the result shows a typical measurement on the adum120n / adum121n with 380 ps p-p jitter. 10 5 0 1 2 3 4 voltage (v) 5 0 time (ns) ?5 ?10 14122-014 figure 16. adum120n / adum121n eye diagram insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation as well as on the materials and material interfaces. the two types of insulation degradation of primary interest are breakdown along surfaces exposed to the air and insulation wear out. surface breakdown is the phenomenon of surface tracking and the primary determinant of surface creepage requirements in system level standards. insulation wear out is the phenomenon where charge injection or displacement currents inside the insulation material cause long-term insulation degradation. surface tracking surface tracking is addressed in electrical safety standards by setting a minimum surface creepage based on the working voltage, the environmental conditions, and the properties of the insulation material. safety agencies perform characterization testing on the surface insulation of components that allows the components to be categorized in different material groups. lower material group ratings are more resistant to surface tracking and, therefore, can provide adequate lifetime with smaller creepage. the minimum creepage for a given working voltage and material group is in each system level standard and is based on the total rms voltage across the isolation, pollution degree, and material group. the material group and creepage for the adum120n / adum121n isolators are presented in table 9. insulation wear out the lifetime of insulation caused by wear out is determined by its thickness, material properties, and the voltage stress applied. it is important to verify that the product lifetime is adequate at the application working voltage. the working voltage supported by an isolator for wear out may not be the same as the working voltage supported for tracking. it is the working voltage applicable to tracking that is specified in most standards. testing and modeling show that the primary driver of long- term degradation is displacement current in the polyimide insulation causing incremental damage. the stress on the insulation can be broken down into broad categories, such as dc stress, which causes very little wear out because there is no displacement current, and an ac component time varying voltage stress, which causes wear out.
adum120n/adum121n data sheet rev. a | page 18 of 19 the ratings in certification documents are usually based on 60 hz sinusoidal stress because this the reflects isolation from line voltage. however, many practical applications have combinations of 60 hz ac and dc across the barrier as shown in equation 1. bec ause only the ac portion of the stress causes wear out, the equation can be rearranged to solve for the ac rms voltage, as is shown in equation 2. for insulation wear out with the polyimide materials used in these products, the ac rms voltage determines th e product lifetime. 2 2 dc rms ac rms v v v + = dc rms rms ac v v v ? = v rms is the total rms working voltage. v ac rms is the time varying portion of the working voltage. v dc is the dc offset of the working voltage. calculation and use of pa rameters example the following example frequently arises in power conversion applications. assume that the line voltage on one side of the isolation is 240 v ac rms and a 400 v dc bus voltage is present on the other side of the isolation barrier. the isolato r material is polyimide. to establish the critical voltages in determining the creepage, clearance , and lifetime of a device, see figure 17 and the following equations. isolation voltage time v ac rms v rms v dc v peak 14122-015 figure 17 . critica l voltage example the working voltage across the barrier from equation 1 is 2 2 dc rms ac rms v v v + = + = rms v v rms = 466 v this is the working voltage used together with the material group and pollution degree when looking up the creepage re quired by a system standard. to determine if the lifetime is adequate, obtain the time varying portion of the working voltage. to obtain the ac rms voltage, use equation 2. 2 2 dc rms rms ac v v v ? = ? = rms ac v v ac rms = 240 v rms in this case, th e ac rms voltage is simply the line voltage of 240 v rms. this calculation is more relevant when the waveform is not sinusoidal. the value is compared to the limits for working voltage in table 15 for the expected lifetime, less t han a 60 hz sin e wave, and it is well within the limit for a 50 - year service life. note that the dc working voltage limit in table 15 is set by the creepage of the package as specified in iec 60664 - 1. this value can differ for sp ecific system level standards.
data sheet adum120n/adum121n rev. a | page 19 of 19 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 18. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model 1, 2 temperature range no. of inputs, v dd1 side no. of inputs, v dd2 side withstand voltage rating (kv rms) fail-safe output state package description package option adum120n1brz ?40c to +125c 2 0 3 high 8-lead soic_n r-8 adum120n1brz-rl7 ?40c to +125c 2 0 3 high 8-lead soic_n, tape and reel r-8 adum120n0brz ?40c to +125c 2 0 3 low 8-lead soic_n r-8 adum120n0brz-rl7 ?40c to +125c 2 0 3 low 8-lead soic_n, tape and reel r-8 adum121n1brz ?40c to +125c 1 1 3 high 8-lead soic_n r-8 adum121n1brz-rl7 ?40c to +125c 1 1 3 high 8-lead soic_n, tape and reel r-8 ADUM121N0BRZ ?40c to +125c 1 1 3 low 8-lead soic_n r-8 ADUM121N0BRZ-rl7 ?40c to +125c 1 1 3 low 8-lead soic_n, tape and reel r-8 adum121n1wbrz ?40c to +125c 1 1 3 high 8-lead soic_n r-8 adum121n1wbrz-rl7 ?40c to +125c 1 1 3 high 8-lead soic_n, tape and reel r-8 1 z = rohs compliant part. 2 w = qualified for auto motive applications. automotive products the adum121n1wbrz and the adum121n1wbrz-rl7 models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the specifications section of this data sheet carefully. only the automot ive grade products shown are available for use in automotive applications. contact your local analog devices account representative for s pecific product ordering information and to obtain the specific automotive reliability reports for these models. ?2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d14122-0-4/16(a)

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